Dr. Philip H. Sweany
University of North Texas
Computer Science and Engineering
(940) 369-7427
Email:

Education

PhD, Colorado State University, 1992.
Major: Computer Science/ "Inter-Block Code Motion Without Copies"
MS, Colorado State University, 1986.
Major: Computer Science
BS, Washington State University, 1983.
Major: Computer Science

Professional Positions

Uncategorized
Associate Professor, University of North Texas. (2003 – Present).
Adjunct Faculty, University of North Texas. (20022003).
Technical Staff, Texas Instruments Dallas TX. (20002003).
Associate Professor, University of North Texas. (19982000).
Assistant Professor, Michigan Technological University. (19921998).
Instructor, Michigan Technological University. (19911992).
Lecturer, Colorado State University. (19901991).
Lecturer, National Technological University. (19901990).
Senior Software Engineer, Quantitative Technology Corporation. (19871989).
Software Engineer, Horizon Research Laboratories. (19871987).
Lecturer, Colorado State University. (19841985).

Professional Memberships

Association for Computing Machinery. (Present).

Computer Science Teachers Association. (Present).

IEEE. (Present).

North Texas Net-Centric Software and Systems Consortium. (Present).

Teach North Texas. (Present).

Teaching

Teaching Experience

University of North Texas
CSCE 1010, Discovering Computer Science, 22 courses.
CSCE 1030, Computer Science I, 9 courses.
CSCE 1040, Computer Science II, 12 courses.
CSCE 2050, Computer Science III, 2 courses.
CSCE 2100, Computing Foundations I, 17 courses.
CSCE 2110, Computing Foundations II, 13 courses.
CSCE 3110, Data Structures and Algorithms, 4 courses.
CSCE 3600, Principles of Systems Programming, 17 courses.
CSCE 3605, IT Systems and Administration, 1 course.
CSCE 3650, Introduction to Compilation Techniques, 5 courses.
CSCE 4430, Programming Languages, 2 courses.
CSCE 4600, Introduction to Operating Systems, 1 course.
CSCE 4650, Introduction to Compilation Techniques, 1 course.
CSCE 4655, Principles of Compiler Optimization, 3 courses.
CSCE 4890, Directed Study, 9 courses.
CSCE 4930, Topics in Computer Science and Engineering, 1 course.
CSCE 4940, Special Computer Application Problem, 1 course.
CSCE 5450, Programming Languages, 2 courses.
CSCE 5640, Operating System Design, 1 course.
CSCE 5650, Compiler Design, 3 courses.
CSCE 5655, Principles of Compiler Optimization, 3 courses.
CSCE 5900, Special Problems, 1 course.
CSCE 5933, Topics in Computer Science and Engineering, 1 course.
CSCE 5934, Directed Study, 7 courses.
CSCE 5950, Master's Thesis, 1 course.
CSCE 6650, Advanced Compiler Techniques, 2 courses.
CSCE 6933, Advanced Topics in Computer Science and Engineering, 1 course.
CSCE 6940, Individual Research, 18 courses.
CSCE 6950, Doctoral Dissertation, 14 courses.
CSCI 3600, Principles of Systems Programming, 2 courses.
CSCI 5200, Automata Theory, 1 course.
CSCI 6940, Individual Research, 2 courses.

Directed Student Learning

Other,"Current PhD Students,". (Present).

Other,"Current PhD Students,". (Present).

Other. (2010 – Present).

Other. (2007 – Present).

Other. (2007 – Present).

Other. (20062006).

Other. (20062006).

Other. (20062006).

Other. (20042006).

Other. (20052005).

Other. (19951995).

Research

Published Intellectual Contributions

Conference Proceeding
Sweany, P. H., Burke, P. (2008). Automatic Code Generation Through Model-Driven Design. 20th Systems and Software Technology Conference, Las Vegas NV, April 2008.
Huang, J., Sweany, P. H. (2007). An FPGA Implementation of Elliptic Curve Cryp­tography for Future Secure Web Transactions. Proceedings of the 20th International Conference on Parallel and Distributed Computing Systems, Las Vegas NV, September 24-26. 296-301.
Williamson, W. J., Sweany, P. H. (1999). Linking Communication and Software Design Courses for Professional Development in Computer Science. Language and Learning Across the Disciplines.
Jang, S., Carr, S., Sweany, P. H., Kuras, D. (1998). A Code Generation Framework for VLIW Ar­chitectures with Partitioned Register Files. Conference on Massively Parallel Computing Systems (MPCS '98).
Sweany, P. H., Beaty, S. (1998). Instruction Scheduling Using Simulated Annealing. Conference on Massively Parallel Computing Systems (MPCS '98).
D., Carr, S., Sweany, P. H. (1998). Value Cloning for Architectures with Partitioned Register Banks. The 1998 Workshop on Compiler Support for Embedded Systems (CASES98).
Ding, C. H., Carr, S., Sweany, P. H. (1997). MoModulo Scheduling with Cache Reuse information. Euro-Par ' 97 Workshop on Instruction-Level Parallelism. 1079-1083. Proceedings of the Third International Euro-Par Conference.
Bourke, M., Sweany, P. H., Beaty, S. (1996). Extending List Scheduling to Consider Execution Frequency. Proceedings of the 29th Annual Hawaii International Conference on System Sciences, Maui, Hawaii, Jan. 193-202.
Carr, S., Ding, C. H., Sweany, P. H. (1996). Improving Software Pipelining with Unroll-and-Jam. Proceedings of the 29th Annual Hawaii International Conference on System Sciences, Maui, Hawaii, Jan. 183-192.
Cho, P., George, D., Ott, L., Predebon, W., Sweany, P. H. (1996). New Faculty Orientation and Seminar Series: Emphasis on Teaching and Learning. Proceedings of 1996 ASEE Annual Conference, June 1996.
Beaty, S. J., Colcord, S., Sweany, P. H. (1996). Using Genetic Algorithms to Fine-Tune In­struction Scheduling. Proceedings of the Second International Conference on Massively Parallel Computing Systems, Ischia, Italy, May 1996.
Brasier, T. S., Sweany, P. H., Carr, S., Beaty, S. j. (1995). CRAIG: A Practical Framework for Combining Instruction and Register Assignment. Parallel Architectures and Compilation Techniques Conference (PACT95), Limassol, Cyprus, June, 1995. 11-18.
Sweany, P. H., Beaty, S. J. (1992). Dominator-Path Scheduling: A Global Scheduling Method. Proceedings of the 25th Microprogramming Workshop (MICRO-25), Portland, OR, December, 1992. 260-263.
Sweany, P. H. (1992). Dominator-Path Scheduling: Inter-Block Code Motion Without Copies. Ph.D Dissertation, Colorado State University, Ft Collins CO..
Sweany, P. H., Beaty, S. J. (1990). Post-Compaction Register Assignment in a Retargetable Compiler. Proceedings of the 23rd Microprogramming Workshop (MICRO-23), Orlando, FL, November, 1990. 107-116.
Howland, M. A., Mueller, R. A., Sweany, P. H. (1987). Trace Scheduling Optimization in a Retargetable Microcode Compiler. Proceedings of the 20rd Microprogramming Workshop (MICRO-20), Colorado Springs, CO, December, 1987. 106-114.
Journal Article
Huang, J., Li, H., Sweany, P. H. (2008). FPGA Implementations of Elliptic Curve Cryptography and Tate Pairing over a Binary Field. Journal of Systems Architecture. 54(12), 1077-1088.
Li, W., Rezaei, M., Kavi, K., Naz, A., Sweany, P. H. (2007). Feasibility of Decoupling Memory Management From the Execution Pipeline. EUROMICRO Journal. 53(12), 927-936.
Naz, A., Kavi, K., Sweany, P. H., Li, W. (2006). A Study of Reconfigurable Split Data Caches and Instruction Caches, Proceedings of the ISCA 19th International Conference on Parallel and Distributed Computing. Distributed Computing.
Li, W., Kavi, K., Naz, A., Sweany, P. H. (2006). Speculative Thread Execution in a Multi­ threaded Dataflow Architecture, Proceedings of the ISCA 19th International Conference. Other.
Naz, A., Kavi, K., Sweany, P. H., Li, W. (2006). Tiny Split Data Caches Make Big Performance Impact for Embedded Applications. Journal of Embedded Computing. 2(2), 207-219.
Naz, A., Kavi, K., Sweany, P. H., Rezaei, M. (2004). A Study of Separate Array and Scalar Caches. Proceedings of the 18th International Symposium on High Performance Comput­ing Systems and Applications. 157-164.
Carr, S., Sweany, P. H. (2004). Automatic Data Partitioning for the Agere Payload Plus Network Processor, Proceedings of the 8th International Conference on Compilers. Other. 238-247.
Naz, A., Rezaei, M., Kavi, K., Sweany, P. H. (2004). Improving Data Cache Performance With Integrated Use Of Split Caches, Victim Cache And Stream Buffers. ACM SIGARCH Computer Architecture News. 41-48.
Naz, A., Kavi, K., Sweany, P. H., Li, W. (2004). Improving Data Cache Performance with Integrated Use of Split Caches, Victim Cache And Stream Buffers, Proceedings of the Workshop on Memory performance Dealing with Applications. Other.
Carr, S., Sweany, P. H. (2003). An Experimental Evaluation of Scalar Replacement on Scientific Benchmarks. Software: Practice and Experience. 33(15), 1419-1445.
Sweany, P. H., Carr, S. (2003). Building a C Compiler Retargetable for DSP Processors. Other.
Sule, D., Carr, S., Sweany, P. H. (2002). Evaluating Register Bank Partitioning with Genetic Algorithms.
Qian, Y., Carr, S., Sweany, P. H. (2002). Loop Fusion for Clustered VLIW Architectures. 112-119.
Qian, Y., Carr, S., Sweany, P. H. (2002). Optimizing Loop Performance for Clustered VLIW Architectures. Other. 271-280.
Bedy, M. J., Carr, S., Onder, S., Sweany, P. H. (2001). Improving Software Pipelining by Hiding Memory Latency with Combined Loads and Prefetches. 69-88. Kluwer Academic Publishers.
Huang, X., Carr, S., Sweany, P. H. (2001). Loop Transformations for Architectures with Parti­tioned Register Banks. Other. 48-55.
Hiser, J., Carr, S., Sweany, P. H. (2000). Global Register Partitioning. Other. 13-23.
Hiser, J., Carr, S., Sweany, P. H., Beaty, S. J. (2000). Register Assignment for Software Pipelin­ing with Partitioned Register Banks. International Parallel and Distributed Processing Symposium (IPDPS. 211-217.
Sweany, P. H. (1998). Global Instruction Scheduling Without Copies.
Allan, V., Beaty, S., Su, B., Sweany, P. H. (1998). Building a Retargetable Local Instruction Scheduler. Software: Practice and Experience. 28(3), 249-284.
Mueller, R. A., Duda, M. R., Sweany, P. H., Walicki, J. S., Horizon, (1988). A Retargetable Compiler for Horizontal Microarchitectures. IEEE Transactions on Software Engineering. 14(5), 575-583.

Contracts, Grants and Sponsored Research

Grant - Research
Sweany, P. H. (Other), "UNTeach Senior Investigator," Sponsored by The National Mathematics and Science Initiative and UTeach Institute, $2400000 Funded. (20082013).
Grant - Teaching
Dantu, R. (Co-Principal), Do, H. (Co-Principal), Keathly, D. (Co-Principal), Sweany, P. H. (Co-Principal), Thompson, M. A. (Co-Principal), "Multifaceted Outreach Program for Students, Teachers, and Professionals," Sponsored by StateFarm, University of North Texas, $24000 Funded. (September 2017August 2018).
Uncategorized
Sweany, P. H. (Co-Principal), "Addressing Computational Needs of Multimedia and Medical Applications," Sponsored by USA Scientific Coordinator, $180000. (Present).
Sweany, P. H. (Principal), "Retargetable Code Generation for Heterogeneous Multi-Processor Computers," Sponsored by Texas Instruments, as part of NSF/IUCRC Center, $30000. (2010 – Present).
Sweany, P. H. (Co-Principal), "Collaborative Research: IUCRC Center Proposal," Sponsored by Net-Centric Software and Systems, NSF, $349482. (2009 – Present).
Sweany, P. H. (Principal), "Retargetable Code Generation for Heterogeneous Multi-Processor Computers," Sponsored by Texas Instruments, as part of NSF/IUCRC Center, $30000. (20092010).
Sweany, P. H. (Co-Principal), "IUCRC-Planning Proposal: UNT Research Site Proposal to join Embedded Systems I/UCRC," Sponsored by National Science Foundation, $10000. (20072007).
Sweany, P. H. (Co-Principal), "Recruiting and Retention Strategies for Computer Science at UNT," Sponsored by Texas Technology Workforce Development Grant Program, $125322. (20062007).
Sweany, P. H. (Principal), "Purposed Conference Support for SCOPIES 05," Sponsored by National Science Foundation, $12500. (20052005).
Sweany, P. H. (Principal), "Substituting CISC Instructions in Compiled DSP Code," Sponsored by UNT 2004 Research Opportunity Program, $4000. (20042004).
Sweany, P. H. (Co-Principal), "Equipping a DSP Lab," Sponsored by TIDSP University Program, $60000. (20032003).
Sweany, P. H. (Principal), "Code Generation Compiler ILP Architectures with Partitioned Register Banks," Sponsored by National Science Foundation, $325534. (19982001).
Sweany, P. H. (Other), "Building a Retargetable Java Bytecode Compiler," Sponsored by Michigan Research Excellence Fund Grant, $30900. (19971998).
Sweany, P. H. (Co-Principal), "Register-Bank Assignment for Distributed-Register, Instruction-Level Parallel Architec-tures," Sponsored by Texas Instruments, $42830. (19971998).
Sweany, P. H. (Principal), "Hiding the Latency Between Level-1 and Level-2 Cache on the DEC Alpha 21164," Sponsored by Digital Equipment Corporation, $45647. (19961997).
Sweany, P. H. (Principal), "Research for Undergraduates Supplement to Global Instruction Scheduling Without Copies," Sponsored by National Science Foundation, $5000. (19961996).
Sweany, P. H. (Co-Principal), "Generating Efficient Code for Horizontal Micro- Architectures With Partitioned Register Files," Sponsored by Texas Instruments, $45647. (19951996).
Sweany, P. H. (Principal), "Hiding the Latency Between Level-1 and Level-2 Cache on the DEC Alpha 21164," Sponsored by Digital Equipment Corporation, $83500. (19951996).
Sweany, P. H. (Principal), "Global Instruction Scheduling Without Copies," Sponsored by National Science Foundation, $97649. (19931996).
Sweany, P. H. (Principal), "Research for Undergraduates Supplement to Global Instruction Scheduling Without Copies," Sponsored by National Science Foundation, $5000. (19951995).
Sweany, P. H. (Principal), "Research for Undergraduates Supplement to Global Instruction Scheduling Without Copies," Sponsored by National Science Foundation, $5000. (19941995).

Service

University Service

Committee Member, Undergraduate Committee. (20082010).

Committee Member, Executive Committee. (20072009).

Committee Member, Graduate Studies Committee. (20052008).

Committee Member, Undergraduate Committee. (20052006).

Committee Member, Executive Committee. (20032005).

Committee Member, Ad hoc Computer Engineering Steering. (20032004).

Committee Chair, Faculty Search Committee. (20032004).

Other, Graduate Studies, CS Department. (19992000).

Committee Chair, College Tenure and Promotion Committee. (19982000).

Other, CS Department representative to University Senate. (19951998).

Other, MTU's "Orientation for New Faculty". (19951996).

Other, Graduate Studies, CS Department. (19921994).

Professional Service

Member, Charter. (20092010).

Committee Member, 3rd International Workshop on Embedded Software Optimization. (20082008).

Committee Member, 10th IEEE International Symposium on High Assurance Systems Engineering. (20072007).

Committee Member, Software and Compilers for Embedded Systems. (20072007).

Committee Member, International Conference on Computing Frontiers. (20052005).

Other, Software and Compilers for Embedded Systems. (20052005).

Committee Member, Research Enhancement Committee. (20042005).

Committee Member, Languages, Compilers and Tools for Embedded Systems. (20032003).

Committee Member, MICRO. (19951995).